A parallel Viterbi decoder for block cyclic and convolution codes
نویسندگان
چکیده
منابع مشابه
A parallel Viterbi decoder for block cyclic and convolution codes
We present a parallel version of Viterbi’s decoding procedure, for which we are able to demonstrate that the resultant task graph has restricted complexity in that the number of communications to or from any processor cannot exceed 4 for BCH codes. The resulting algorithm works in lock step making it suitable for implementation on a systolic processor array, which we have implemented on a field...
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ژورنال
عنوان ژورنال: Signal Processing
سال: 2006
ISSN: 0165-1684
DOI: 10.1016/j.sigpro.2005.05.016